Leakage in nanometer CMOS technologies / [ed. by] Siva G. Narendra, Anantha Chandrakasan.

Contributor(s): Narendra, Siva G. (Siva Gurusami), 1971- | Chandrakasan, Anantha P Material type: Text

TextLanguage: English Series: Series on integrated circuits and systemsPublication details: New York : Springer, 2006. Description: x, 307 p. : ill. ; 24 cmISBN: 0387257373; 0387281339 (ebook); 9780387257372; 9780387281339Subject(s): Metal oxide semiconductors, Complementary -- Design and construction | Integrated circuits -- Design and construction | Electric leakage -- PreventionDDC classification: 621.38412 LOC classification: TK7871.99.M44 | L43 2006Online resources: Table of contents | Publisher description | WorldCat details | E-Book Fulltext

Contents:

TOC Taxonomy of leakage : sources, impact, and solutions -- Leakage dependence on input vector / Siva Narendra ... [et al.] -- Power gating and dynamic voltage scaling / Benton Calhoun, James Kao, and Anantha Chandrakasan -- Methodologies for power gating / Kimiyoshi Usami and Takayasu Sakurai -- Body biasing / Tadahiro Kuroda and Takayasu Sakurai -- Process variation and adaptive design / Siva Narendra ... [et al.] -- Memory leakage reduction / Takayuki Kawahara and Kiyoo Itoh -- Active leakage reduction and multi-performance devices / Siva Narendra ... [et al.] -- Impact of leakage power and variation on testing / Ali Keshavarzi and Kaushik Roy -- Case study : leakage reduction in Hitachi/Renesas microprocessors / Masayuki Miyazaki, Hiroyuki Mizuno, and Takayuki Kawahara -- Case study : leakage reduction in the Intel Xscale microprocessor / Lawrence Clark -- Transistor design to reduce leakage / Sagar Suthram, Siva Narendra, and Scott Thompson.

Summary: Summary: Covers promising solutions at the device, circuit, and architecture levels of abstraction after first explaining the sensitivity of the various MOS leakage sources to these conditions from the first principles. This title highlights different device design choices that exist to mitigate increases in the leakage components as technology scales.

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Holdings ( 3 )
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Holdings
Item type	Current library	Collection	Call number	Copy number	Status	Barcode
E-Book	Dr. S. R. Lasker Library, EWU E-book	Non-fiction	621.38412 LEA 2006 (Browse shelf(Opens below))		Not for loan
Text	Dr. S. R. Lasker Library, EWU Reserve Section	Non-fiction	621.38412 LEA (Browse shelf(Opens below))	C-1	Not For Loan	22116
Text	Dr. S. R. Lasker Library, EWU Circulation Section	Non-fiction	621.38412 LEA 2006 (Browse shelf(Opens below))	C-2	Available	22376

Total holds: 0

Includes bibliographical references and index.

TOC Taxonomy of leakage : sources, impact, and solutions --
Leakage dependence on input vector / Siva Narendra ... [et al.] --
Power gating and dynamic voltage scaling / Benton Calhoun, James Kao, and Anantha Chandrakasan --
Methodologies for power gating / Kimiyoshi Usami and Takayasu Sakurai --
Body biasing / Tadahiro Kuroda and Takayasu Sakurai --
Process variation and adaptive design / Siva Narendra ... [et al.] --
Memory leakage reduction / Takayuki Kawahara and Kiyoo Itoh --
Active leakage reduction and multi-performance devices / Siva Narendra ... [et al.] --
Impact of leakage power and variation on testing / Ali Keshavarzi and Kaushik Roy --
Case study : leakage reduction in Hitachi/Renesas microprocessors / Masayuki Miyazaki, Hiroyuki Mizuno, and Takayuki Kawahara --
Case study : leakage reduction in the Intel Xscale microprocessor / Lawrence Clark --
Transistor design to reduce leakage / Sagar Suthram, Siva Narendra, and Scott Thompson.

Summary:
Covers promising solutions at the device, circuit, and architecture levels of abstraction after first explaining the sensitivity of the various MOS leakage sources to these conditions from the first principles. This title highlights different device design choices that exist to mitigate increases in the leakage components as technology scales.

EEE

Tahur Ahmed

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