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Embedded system design : a unified hardware/software introduction / Frank Vahid and Tony Givargis.

By: Vahid, FrankContributor(s): Givargis, TonyMaterial type: TextTextLanguage: English Publication details: New York : Wiley, c2002. ; New Delhi : Wiley, 2007. Description: xxi, 324 p. : ill. ; 24 cmISBN: 0471386782 (cloth : alk. paper); 812650837x; 9780471386780Subject(s): Embedded computer systemsDDC classification: 005.2 LOC classification: TK7895.E42 | V33 2002Online resources: Publisher description | Table of contents | WorldCat details | Ebook Fulltext
Contents:
TOC Design Challenge--Optimizing Design Metrics -- Common Design Metrics -- The Time-to-Market Design Metric -- The NRE and Unit Cost Design Metrics -- The Performance Design Metric -- Processor Technology -- General-Purpose Processors--Software -- Single-Purpose Processors--Hardware -- Application-Specific Processors -- IC Technology -- Full-Custom/VLSI -- Semicustom ASIC (Gate Array and Standard Cell) -- PLD -- Trends -- Design Technology -- Compilation/Synthesis -- Libraries/IP -- Test/Verification -- More Productivity Improvers -- Trends -- Trade-offs -- Design Productivity Gap -- Custom Single-Purpose Processors: Hardware -- Combinational Logic -- Transistors and Logic Gates -- Basic Combinational Logic Design -- RT-Level Combinational Components -- Sequential Logic -- Flip-Flops -- RT-Level Sequential Components -- Sequential Logic Design -- Custom Single-Purpose Processor Design -- RT-Level Custom Single-Purpose Processor Design -- Optimizing Custom Single-Purpose Processors -- Optimizing the Original Program -- Optimizing the FSMD -- Optimizing the Datapath -- Optimizing the FSM -- General-Purpose Processors: Software -- Basic Architecture -- Datapath -- Control Unit -- Memory -- Operation -- Instruction Execution -- Pipelining -- Superscalar and VLIW Architectures -- Programmer's View -- Instruction Set -- Program and Data Memory Space -- Registers -- I/O -- Interrupts -- Example: Assembly-Language Programming of Device Drivers -- Operating System -- Development Environment -- Design Flow and Tools.
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Holdings
Item type Current library Collection Call number Copy number Status Date due Barcode Item holds
E-Book E-Book Dr. S. R. Lasker Library, EWU
E-book 		Non-fiction 005.2 VAE 2002 (Browse shelf(Opens below)) Not for loan
Text Text Dr. S. R. Lasker Library, EWU
Reserve Section 		Non-fiction 005.2 VAE 2002 (Browse shelf(Opens below)) C-1 Not For Loan 20319
Text Text Dr. S. R. Lasker Library, EWU
Reserve Section 		Non-fiction 005.2 VAE 2002 (Browse shelf(Opens below)) C-2 Not For Loan 20320
Text Text Dr. S. R. Lasker Library, EWU
Circulation Section 		Non-fiction 005.2 VAE 2002 (Browse shelf(Opens below)) C-3 Available 20321
Text Text Dr. S. R. Lasker Library, EWU
Circulation Section 		Non-fiction 005.2 VAE 2002 (Browse shelf(Opens below)) C-4 Available 20322
Text Text Dr. S. R. Lasker Library, EWU
Circulation Section 		Non-fiction 005.2 VAE 2002 (Browse shelf(Opens below)) C-5 Available 20323
Total holds: 0

Includes bibliographical references and index.

TOC Design Challenge--Optimizing Design Metrics --
Common Design Metrics --
The Time-to-Market Design Metric --
The NRE and Unit Cost Design Metrics --
The Performance Design Metric --
Processor Technology --
General-Purpose Processors--Software --
Single-Purpose Processors--Hardware --
Application-Specific Processors --
IC Technology --
Full-Custom/VLSI --
Semicustom ASIC (Gate Array and Standard Cell) --
PLD --
Trends --
Design Technology --
Compilation/Synthesis --
Libraries/IP --
Test/Verification --
More Productivity Improvers --
Trends --
Trade-offs --
Design Productivity Gap --
Custom Single-Purpose Processors: Hardware --
Combinational Logic --
Transistors and Logic Gates --
Basic Combinational Logic Design --
RT-Level Combinational Components --
Sequential Logic --
Flip-Flops --
RT-Level Sequential Components --
Sequential Logic Design --
Custom Single-Purpose Processor Design --
RT-Level Custom Single-Purpose Processor Design --
Optimizing Custom Single-Purpose Processors --
Optimizing the Original Program --
Optimizing the FSMD --
Optimizing the Datapath --
Optimizing the FSM --
General-Purpose Processors: Software --
Basic Architecture --
Datapath --
Control Unit --
Memory --
Operation --
Instruction Execution --
Pipelining --
Superscalar and VLIW Architectures --
Programmer's View --
Instruction Set --
Program and Data Memory Space --
Registers --
I/O --
Interrupts --
Example: Assembly-Language Programming of Device Drivers --
Operating System --
Development Environment --
Design Flow and Tools.

CSE

Tahur Ahmed

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