Synthesis and optimization of digital circuits / Giovanni De Micheli

By: De Micheli, Giovanni
Material type: TextTextLanguage: English Series: McGraw-Hill series in electrical and computer engineering: Publisher: New York ; London : New Dehi : McGraw-Hill, c1994Description: xviii, 579 p ; 23 cmISBN: 0070163332; 0071132716 (Cover)Subject(s): Digital integrated circuits -- Design and construction -- Data processing | Digital electronics -- Data processing | Computer-aided designDDC classification: 621.3950285 Online resources: WorldCat details | E-book Fulltext
Contents:
Chapter 1: Introduction -- Chapter 2: Background -- Chapter 3: Hardware modeling -- Chapter 4: Architectural synthesis -- Chapter 5: Scheduling algorithms -- Chapter 6: Resource sharing and binding -- Chapter 7: Two-level combinational logic optimization -- Chapter 8: Multiple-level combinational logic optimization -- Chapter 9: Sequential logic optimization -- Chapter 10: Cell-library binding -- Chapter 11: State-of-the-art and future trends. Table of contents
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Item type Current location Collection Call number Copy number Status Date due Barcode Item holds
E-Book E-Book EWU Library
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Non-fiction 621.3950285 MIS 1994 (Browse shelf) Not for loan
Text Text EWU Library
Reserve Section
Non-fiction 621.395'0285 MIS 1994 (Browse shelf) C-1 Not For Loan 15226
Text Text EWU Library
Reserve Section
Non-fiction 621.395'0285 MIS 1994 (Browse shelf) C-2 Not For Loan 15227
Text Text EWU Library
Circulation Section
Non-fiction 621.395'0285 MIS 1994 (Browse shelf) C-3 Available 15228
Text Text EWU Library
Circulation Section
Non-fiction 621.395'0285 MIS 1994 (Browse shelf) C-4 Available 15229
Text Text EWU Library
Circulation Section
Non-fiction 621.395'0285 MIS 1994 (Browse shelf) C-5 Available 15230
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Chapter 1: Introduction --
Chapter 2: Background --
Chapter 3: Hardware modeling --
Chapter 4: Architectural synthesis --
Chapter 5: Scheduling algorithms --
Chapter 6: Resource sharing and binding --
Chapter 7: Two-level combinational logic optimization --
Chapter 8: Multiple-level combinational logic optimization --
Chapter 9: Sequential logic optimization --
Chapter 10: Cell-library binding --
Chapter 11: State-of-the-art and future trends. Table of contents

Electrical & Electronic Engineering

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